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cortex A9 core hang up

I'm trying to enable SMP functionality on iMX6 board. It contains 4 cores. I use core 0 to wake up core 1, core 2 and core 3. After initialization, everything is OK, each core can execute a task...

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Coherency, Cache And Configurability - Interview

Hi all,   I was recently interviewed by Ann Mutschler at SEMICONDUCTOR ENGINEERING regarding Cache Coherency and Configurability. It's a useful summary of why we need hardware coherency to simplify...

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Join to engage with thousands of experts on the ARM Connected Community

Whether you are an established developer, an ARM partner or just getting started on ARM, we know you'll find a lot in the Community to keep you coming back.  The ARM Connected Community can help solve...

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ETM trace capture from DS-5 FVP

Hello,   Is there a way to dump the ETM trace (using DTSL) from a VE_AEMv8x1 FVP? I would like to store the RAW trace somewhere so I can process it later.   Thank you, Andrei

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DS-5_v5.23.1 Debugger Error

Hi, I am trying to program a target CPU (R4) on my FPGA platform and I keep getting the following error:   [ME@MACHINE bin]$ debugger --cdb-root /home/ME/ConfigDb --cdb-entry="COMPANY::BOARD::Bare...

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ARM DS-5 IDE quits abnormally when editing Window->Preferences->Code Templates

Hi,   Currently I am using ARM DS-5 Profecssional Edition (Version 5.22.0) Build number: 5220021 When I tried to add/edit some C/C++ source/header templates in Window->Preferences->Code...

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DS-5/Jython: How to execute the functions of jython scripts on the debugger CLT?

Requirement: Develop a debug layer for new CPU based on DS-5. 1. Basically I want to use jython to develop that, and it could be easily loaded and run on debugger CLT by source command. (e.g. source...

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Can you help me identify the model of this board?

Hello, Can you help me identify the model of this board? There is an AT91SAM9AX25 chip on it and two ETH ports but I can't find the producer/model. Thank you!

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How are the PCIe lanes of the JUNO system connected

Hi,   the documentation states: 4 lane Gen 2.0 PCI-Express (Juno r1 and r2 only) The JUNO system has 4 PCIe connectors:      x16, x8, x4, x4   Does every connector have 4 independent lanes (so all...

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Integer to Hex

Hello everybody,   I am  working on an ARM program that should return a string which is the hexadecimal representation of an integer. As seen below, I have started  the  basics of the algorithm and...

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About AHB5 protection control signals

In AHB5, we have extended memory bits as [6:4] hprot. Previously we have [3:0] hprot. For implementation purpose, i treated [6:4] as a separate signal. This separate signal am qualifying based on some...

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1, 2, 3 Easy steps to win a Samsung Galaxy S7!

Hi,   You might've heard of ARM Graphics Week, it's an online event which will run from April 18-22nd. The week will include write ups of a range of VR content by ARM including a new technical demo and...

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why Coremark Results for Cortex a9 and A53 are similar

Hi why i am getting same Coremark numbers for Cortex A53 and A9, while A9 is 32bit Armv7 architecture, and A53 is 64 bit Armv8 Architecture. with GCC LINARO i am getting around 3/MHz, and with ARM DS5,...

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System Validation at ARM: Enabling our Partners to Build Better Systems

(Huge thanks to the system validation team in Bangalore for providing me with all of the technical information here. Much appreciated!)   Functional validation is widely acknowledged as one of the...

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树莓派3(社区送的)-1

树莓派3今天上午就到了,顺丰真快,先上几张图吧,后续去买些必要的配件,再跑系统吧。 .

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I'm new to ARM Neon intrinsics, can you give me some advice and tell if I'm...

Hi,   I'm new to using Neon intrinsics and I would like to have some advice and maybe some notes about what I'm doing wrong. Here is a code I've written that resize an image. It outputs 8 pixel to...

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Cortex-A9 GIC: priority cannot be drop & deactivation

Contexton i.MX6Quad board, when the system running, I found that Core3 can not deal with any interrupt. view the GIC interface registers by Trace32, the GICC_RPR is always 0, which means the highest...

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On line il nuovo sito ARM dedicato agli sviluppatori

È in linea la nuova versione del sito ARM Developer dedicato a tutti gli sviluppatori che utilizzano gli strumenti e le piattaforme ARM...

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Cortex-M3 e Cortex-M4, gestire le eccezioni su condizioni di errore

In una application note, che Keil ha aggiornato il mese scorso, si descrive come rilevare gli errori e gestire le eccezioni dal punto di vista del programmatore, con esempi software che illustrano cosa...

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OpenGL ES 3.2 support problem with Mali OpenGL ES Emulator 3.0

I see the latest Mali OpenGL ES Emulator 3.0 support the OpenGL ES 3.2 and also include the gl32.h head file.However, when I use some ES 3.2 API like glPatchParameteri, the link failed with unresolved...

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