Useful links for ARM's Beetle IoT Subsystem platform
Beetle is an evaluation platform for ARM's IoT Subsystem for Cortex-M. It is available to ARM partners interested in evaluating IoT subsytems only by request (not available to purchase directly). For...
View ArticleAn exciting new partnership program launched today!
At DAC today, June 6th, we announced the creation of a new partnership program for design houses. Called the ARM Approved Design Partner program, this initiative creates a group of design houses which...
View ArticleWebgl confromance test hangs on Mali T-760 (Samsung Galaxy S6) on Chrome on...
We are running webgl confromance test on Mali T-760 (Samsung Galaxy S6) on Chrome on Android. But, the shader while handling the uniform with 10000 operators hangs and the gpu timeouts (after 10secs)....
View ArticleEnabling NEON Instructions on Pixhawk
I am trying to get a quadcopter flying using the Pixhawk controller (Cortex M4 running NuttX RTOS) and I am using the Simulink Pixhawk PSP to implement a custom controller. Our controller uses neural...
View ArticleMagically Reduce Coding Time with PSoC Creator
A lot of people think that PSoC is all about reconfigurable hardware and custom design. While you absolutely can make unique and powerful circuits with the PSoC Creator schematic editor, the reality is...
View Articleprefix sum with Opencl
Hi, I am accelerating a image processing algorithm with OpenCL on the cellphone, however I met a case which had a very poor performance. The case is to calculate the prefix sum of each row on the...
View ArticleSo you think developing an ARM®-based IoT chip needs to be complex or...
Abstract: As we move into an era where intelligence is being added to even the simplest of products, we are seeing an increased demand for custom SoCs. These custom SoCs typically integrate a processor...
View Articlecan we delay read and write transactions(axi4) by providing delay in register...
Basically I want to provide delay of 15 clock cycles for writing and reading through axi4 bus .Is it possible?
View ArticleFAQ: What are the differences between the Linaro lsk-3.18-armlt and Linaro...
Introduction Feature support big.LITTLE MP (HMP) Patchset HDMI PCIe Windowing System / GUI OpenGL OpenCL Introduction The Linaro ARMLT (ARM Landing Team) take inputs from mainline, the LSK (LSK -...
View ArticleExpansion of ARM’s DesignStart initiative, KnuPath neural processor, Gartner...
Several reporters, including Graham Pitcher from New Electronics highlight the expansion of ARM’s DesignStart initiative in partnership with Cadence and Mentor Graphics. Pitcher quotes ARM Vice...
View ArticleDigital world and neuroscience on a collision course?
Something of major significance happened on Friday June 3rd . The computing world collided with the world of nueroscience, here are the two relevant referneces: The Independent reported that Elon Musk...
View ArticleNucleoF429 基础应用： TIM1+ADC+USART 波形显示
上次竞答获赠的NucleoF429到手好几天了，陆续看了一些资料，180MHz的主频比起之前48MHz/72MHz的芯片来说，性能提升不少，外设功能也一应俱全。但也没玩什么高端的（比如图像处理，跑OS等），也体现不出180M的性能优势来。所以还是按照惯例，先跑一个简单的Demo再说。（上次拿到F031K6时，说要做一个USART的波形显示，后来一忙也忘了，这次顺便补上。）...
View ArticleDAC 2016: ARM expands efforts to speed designs to prototype, production
AUSTIN, Texas—ARM this week took two big steps to empower innovation, announcing an expansion of the DesignStart program and unveiling an ARM-approved design house service. Both are designed to give...
View ArticleDAC 2016: ARM unveils POP IP for Cortex-A73, Mali-G71 for mainstream mobile SoCs
AUSTIN, Texas—With an eye toward enabling next-generation mainstream mobile designs, ARM this week announced ARM Artisan physical IP, including POP™ IP, based on the new ARM Cortex-A73 processor....
View ArticleSC and SD states in case of ReadNoSnoop transactions
Hi All, This question is regarding "ReadNoSnoop" transaction of AMBA- ACE protocol. If "ReadNoSnoop" transaction is used in a region of memory that is not shareable with other masters, then how can the...
View ArticleCreating flash loadable application in arm ds5
Hi this is saida, new to this community i am facing problem with arm ds5, if any one have solution to my problem please send a reply 1) i am creating a C project in DS5 IDE which doesn't have any...
View ArticleEvolving IP Configurability with ARM IP Tooling
The trend for the electronics industry remains the same as ever; we want chips that are smaller, faster, more efficient. When you look at the trajectory of SoC designs you can see that the cost of...
View ArticleNucleo-144 STM32F429应用：硬件IIC驱动0.91英寸OLED+MPU9250
社区获奖的板子144pin的Nucleo STM32F429已经到手一周多了，这两天刚好有空立马玩起来。昨天晚上纯手工按照Arudino...
View ArticleIs it possible to read the raw L1/L2 cache data and tag bits on the Cortex-A9?
I've been digging through the Technical Reference Manual (TRM) for the Cortex-A9 and so far it seems that it's possible to gather data about events such as hit and miss rates, but there doesn't seem to...
View ArticleThe non-secure copy of the GICC_CTLR gives FIQEn bit as reserved. How to...
In the the arm gic arch specification (version 2) section 3.9.2, it has been given that for any implementation of GICv2 (with or without Security Extn) we can configure the GIC to generate FIQ for...
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