USBH and GUI thread problem (from Keil examples)
I am currently working on http://www.keil.com/appnotes/docs/apnt_268.asp example and stuck at stage 3 and 4. The MC doesn't start GUI thread and when I plug in a USB the os_error is called. How can I...
View ArticleTechnology Update: The Scalable Vector Extension (SVE) for the ARMv8-A...
Today at Hot Chips in Cupertino, I had the opportunity to present the latest update to our ARMv8-A architecture, known as the Scalable Vector Extension or SVE. Before going into the technical details,...
View ArticleThe Mali GPU: An Abstract Machine, Part 4 - The Bifrost Shader Core
We have recently announced the first GPU in the Mali Bifrost architecture family, the Mali-G71. While the overall rendering model it implements is similar to previous Mali GPUs – the Bifrost family is...
View ArticleProcess ADC data, moved by DMA, using CMSIS DSP: what's the right way?
Hi to you all, I've a firmware running on a NXP LPCLink2 (LPC4370: 204 Mhz Cortex M4 MCU) board which basically does this: Fills the ADC FIFO @40msps. Copies the data into memory using the built-in DMA...
View ArticleIs your personal information available via public MQTT brokers?
The following very interesting paper from DEFCON shows how vulnerable MQTT brokers can be if the designers are not carefully considering the various attack vectors that can be exploited in an IoT...
View ArticleProblem with GTIMER on cortex A7
Hi, Right now, I am using BCM47452 SOC which is having single core ARM cortex A7 MPCORE. From the latest kernel sources, the GTIMER is initialized with the external clock source of 40Khz. But, I...
View ArticleCortex-A7 Generic Timer Clock and Operation
Hi, I'm using NXP imx6ul-evk(single core cortex-a7 processor) and I'm trying to operate CPU at different frequencies(642MHz, 480MHz, 100MHz, 12MHz) and experiencing time drift on certain...
View ArticleTrustZone Controller in FVP Cortex57-A Base platform
Hi, I start to learn and program TZC-400 in FVP Cortext57-A Base platform with DS-5, and encounter something that I don't understand. I start the FVP as non-secure mode by using the paramter...
View ArticleInterview with Steve Furber
armdevices.net have put up a 93 minute interview with Steve Furber on their web page ARM architect: Steve Furber on YouTube ARM microarchitect: Steve Furber Links to their three part interview...
View ArticlenRF52832 -硬件认识
PCA10040 这个版本代号 硬件包含的部分有 nRF52832 周边 硬件文件的 pca10040_sheet1_radio.schdoc 这个文件包含了: nfc 接口 ANT接口 电源部分 电源的供电来源有三种：usb， bat， 还有另外接电。 P22
View ArticleUnleashing your Cortex M4 or M7 : Steps to reach good code performance
Following article details usage of Cortex-M4 & Cortex-M7 DSP extension in C as well as compiler options and C concepts to improve an algorithm efficiency. The algorithm is a basic arithmetic sum....
View ArticleUnleashing your Cortex M4 or M7 : Parallel comparison
Wondering how these cores can speed up your algorithms ? Following article details usage of Cortex-M4 & Cortex-M7 DSP extension in C to perform parallel comparison on a Mix/Max detection...
View Articlein 4.1.0 :soinfo_relocate(linker.cpp:993): cannot locate symbol "log2"...
cannot locate symbol "log2" referenced by "libGLES_mgd.so"
View Articlemali t628 mp6
Why mali T628 mp6 the Meizu MX4 Pro Meizu MX4 Pro в бенчмарках AnTuTu, 3DMark, GFXBench, Vellamo has a better result in 3dmak (ice strom ultimated) than galaxy s5 900h (mali t628 mp6)??? is a...
View ArticleProcess ADC data, moved by DMA, using CMSIS DSP: what's the right way?
Hi to you all, I've a firmware running on a NXP LPCLink2 (LPC4370: 204 Mhz Cortex M4 MCU) board which basically does this: Fills the ADC FIFO @40msps. Copies the data into memory using the built-in DMA...
View ArticleWhich block is LPI Q-channel connected to in a normal ARM platform ?
Hi, As in title, any one knows to which block should an IP's LPI Q-channel be connected ? Thanks and best regards, Xinwei
View ArticleBooting Linux on the ARMv8-A model provided with DS-5 Ultimate Edition
Note this blog is only valid for Linaro distributions up to 2014. Newer distributions support AEMv8 Base Model as supplied with DS-5 5.24 and later. For information on this model, see here. For...
View ArticleLoss of information - SMMUL
Why the Cortex M4 instruction SMMUL (32 = 32 x 32b) preserves a redundant sign bit and discards one useful bit of information? What could possibly be the justification for such blatant disregard of the...
View ArticleHow do I find an article by Joseph Yiu - Cortex-M for Beginners - White Paper...
I already asked the question in my title of the subject. Looking for: Paper - Cortex-M for Beginners by Joseph Yiu
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