Quantcast
Channel: ARM Connected Community : All Content - All Communities
Viewing all articles
Browse latest Browse all 3617

L1 Cache Eviction Corrupting DDR on A9

$
0
0
Hi All!   I am working with a Xilinx Zynq 7000 SoC which uses the Cortex A9 as a CPU.   I've observed a problem wherein a section of memory marked strongly-ordered and non-cacheable (0xc02) in the MMU table gets corrupted by what appears to

Viewing all articles
Browse latest Browse all 3617

Trending Articles