What’s new with the Memory Protection Unit (MPU) in Cortex-M23 and Cortex-M33?
ARM Cortex-M23 and Cortex-M33 processors, announced recently at ARM TechCon 2016, both integrate a new Memory Protection Unit (MPU). This optional MPU is based on an updated ARM Protected Memory...
View ArticleEvolving the ARM Community
ARM Community changes: What they mean for you Big changes are coming to the ARM Connected Community next week as we deliver an easier, cleaner and more integrated content-creation and consumption...
View ArticleOPTEE 2.0 tee-supplicant issue
Hi experts, Today I was trying to use the latest OPTEE version to replace my previous one (v1.1.0) on my Juno board and I met one issue about tee-supplicant. I used the initialization script from...
View ArticleiWave Systems Company Overview
Embedded Systems Product Engineering Services Company. iWave Systems Technologies, an ISO 9001:2015 certified company, established in the year 1999, focuses on standard and customised System on...
View ArticleNewsletter: Developing embedded software and systems?
Developing embedded software and systems? Join the embedded software revolution! Silicon without software is just sand! View the December Imperas Newsletter: click here!
View ArticleCan the sub-folders in a DS-5 project check out from different CVS repositories?
Hi All, My team is using ARM DS-5 Professional Edition (v5.19), and we are using build-in CVS function to control the source versions. We are having a problem of checking out folders from different...
View ArticleGearing up for the Community transition tomorrow 0830GMT - 6-8hour downtime
Hi all, we are gearing up for the Community transition tomorrow... We’re finalising preparations to transition onto the new platform and we’re on the verge of going live! This means…. The new...
View ArticleARINC 653 Scheduling App for the Xen hypervisor on Zynq
ARINC 653 Scheduling App makes it more convenient to use the ARINC 653 CPU scheduler in the Xen hypervisor. Current app works with XZD (the Xen Zynq Distribution, targeted to the quad core ARM Cortex...
View ArticleARMv8 trap reporting for MRC/VMRS
Hi ARM, In ARMv8, the spec for trap reporting to AARCH64, it specifies that the CPU translates AARCH32 register numbers to the AARCH64 register number (pg 1942 of DDI0487A_k). There is however no...
View ArticleDesign your ARM Cortex-M0 IoT chip for free - on-demand
Interested in designing an IoT device with an ARM Cortex-M0? This webinar describes the Cortex-M0 processor’s features and technical specifications in the context of IoT. Additionally, it presents...
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